Experiments
Select an experiment to launch the simulation.
1Exp
Easy
EST. TIME: 45 MINStudy and Verification of Logic Gates
Study of basic logic gates (AND, OR, NOT, NAND, NOR, XOR, XNOR).
2Exp
Medium
EST. TIME: 45 MINHalf Adder and Full Adder
Design and verification of Half Adder and Full Adder circuits.
3Exp
Medium
EST. TIME: 45 MINHalf Subtractor and Full Subtractor
Design and verification of Half Subtractor and Full Subtractor circuits.
4Exp
Hard
EST. TIME: 45 MINCode Conversion (Binary to Gray & Gray to Binary)
Design 4-bit Binary to Gray and Gray to Binary code converters.
5Exp
Medium
EST. TIME: 45 MINCombinational Logic Design (SOP & POS)
Design and verify combinational logic in SOP and POS forms.
6Exp
Medium
EST. TIME: 45 MINDecoder and Encoder Circuits
Realization of 2:4 Decoder and 4:2 Encoder circuits.
7Exp
Medium
EST. TIME: 45 MINMultiplexer and Demultiplexer
Design and verify 4:1 Multiplexer and 1:4 Demultiplexer.
8Exp
Medium
EST. TIME: 45 MINComparators (1-bit & 4-bit)
Design 1-bit comparator and study 4-bit comparator (IC 7485).